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 A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Features and Benefits
Customer programmable offset, sensitivity, sensitivity temperature coefficient, and polarity Programmability at end-of-line Ratiometric sensitivity, quiescent voltage output, and clamps for interfacing with application DAC Temperature-stable quiescent voltage output and sensitivity Precise recoverability after temperature cycling Output voltage clamps provide short circuit diagnostic capabilities Wide ambient temperature range: -40C to 150C Immune to mechanical stress Miniature package options
Description
New applications for linear output Hall effect sensors, such as displacement, angular position, and current measurement, require high accuracy in conjunction with small package size. The Allegro(R) A138x family of programmable linear Hall effect sensors was designed specifically to achieve both goals. These temperature-stable devices are available in a miniature surface mount package (SOT23-W) and an ultramini throughhole single-in-line package. The accuracy of these devices is enhanced via programmability on the output pin for end-of-line optimization without the added complexity and cost of a fully programmable device. These ratiometric Hall effect sensors provide a voltage output that is proportional to the applied magnetic field. Both the quiescent voltage output and magnetic sensitivity are useradjustable. The quiescent voltage output can be set around 50% of the supply voltage, and the sensitivity adjusted between 2 mV/G and 9 mV/G over the device family. Programming selections also exist for output polarity and temperature compensation. The features of this linear family make it ideal for high accuracy requirements of automotive and industrial applications, and performance is guaranteed over an extended temperature range, -40C to 150C.
Continued on the next page...
Packages
3 pin surface mount SOT23-W (suffix LH) 3 pin ultramini SIP (suffix UA)
Not to scale
Functional Block Diagram
V+ VCC
To all subcircuits
Dynamic Offset Cancellation
Amp
Filter
Out
VOUT (Programming)
CBYPASS
Hall Drive Circuit Gain Temperature Coefficient Trim Control
GND
Gain
Offset
A1381-DS, Rev. 1
A1381, A1382, A1383, and A1384
Description (continued)
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Each BiCMOS monolithic circuit integrates a Hall element, temperature-compensating circuitry to reduce the intrinsic sensitivity drift of the Hall element, a small-signal high-gain amplifier, a clamped low-impedance output stage, and a proprietary dynamic Selection Guide
Part Number Packing* Package Surface mount Through hole Surface mount Through hole Surface mount Through hole Surface mount Through hole Surface mount Through hole Surface mount Through hole Surface mount Through hole Surface mount Through hole
offset cancellation technique. The A138x sensors are provided in a 3 pin ultramini single-in-line package (UA suffix), and a 3 pin surface mount SOT-23W package (LH suffix).
TA (C) -40 to 85
Internal Bandwidth (kHz)
Sensitivity Range (mV/G)
A1381ELHLT-T Tape and reel, 3000 pieces/reel A1381EUA-T Bulk bag, 500 pieces/bag A1381EUATI-T Tape and reel, 2000 pieces/reel A1381LLHLT-T Tape and reel, 3000 pieces/reel A1381LUA-T Bulk bag, 500 pieces/bag A1381LUATI-T Tape and reel, 2000 pieces/reel A1382ELHLT-T Tape and reel, 3000 pieces/reel A1382EUA-T Bulk bag, 500 pieces/bag A1382EUATI-T Tape and reel, 2000 pieces/reel A1382LLHLT-T Tape and reel, 3000 pieces/reel A1382LUA-T Bulk bag, 500 pieces/bag A1382LUATI-T Tape and reel, 2000 pieces/reel A1383ELHLT-T Tape and reel, 3000 pieces/reel A1383EUA-T Bulk bag, 500 pieces/bag A1383EUATI-T Tape and reel, 2000 pieces/reel A1383LLHLT-T Tape and reel, 3000 pieces/reel A1383LUA-T Bulk bag, 500 pieces/bag A1383LUATI-T Tape and reel, 2000 pieces/reel A1384ELHLT-T Tape and reel, 3000 pieces/reel A1384EUA-T Bulk bag, 500 pieces/bag A1384EUATI-T Tape and reel, 2000 pieces/reel A1384LLHLT-T Tape and reel, 3000 pieces/reel A1384LUA-T Bulk bag, 500 pieces/bag A1384LUATI-T Tape and reel, 2000 pieces/reel *Contact Allegro for additional packing options.
12 -40 to 150
6.00 to 9.00
-40 to 85 17 -40 to 150 4.00 to 6.25
-40 to 85 21 -40 to 150 2.75 to 4.25
-40 to 85 27 -40 to 150 2.00 to 3.00
Absolute Maximum Ratings
Characteristic Forward Supply Voltage Reverse Supply Voltage Forward Output Voltage Reverse Output Voltage Output Source Current Output Sink Current Operating Ambient Temperature Storage Temperature Maximum Junction Temperature Symbol VCC VRCC VOUT VROUT IOUT(SOURCE) IOUT(SINK) TA Tstg TJ(max) Number LH 1 3
1 2 1 2 3
Notes
VOUT to GND VCC to VOUT Range E Range L
Rating 8 -0.1 28 -0.1 2 10 -40 to 85 -40 to 150 -65 to 165 165
Units V V V V mA mA C C C C
Pin-out Diagrams
LH Package 3 UA Package
UA 1 2 3
Name VCC GND VOUT
Description Input power supply; use bypass capacitor to connect to ground Ground Output signal; also used for programming
2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
2
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
OPERATING CHARACTERISTICS, valid over full operating temperature range, TA; CBYPASS= 0.1 F, VCC = 5 V, unless otherwise specified Characteristic
ELECTRICAL CHARACTERISTICS Supply Voltage Supply Current VCC ICC No load on VOUT A1381 A1382 Power-On Time1 tPO A1383 A1384 Delay to Clamp1 Supply Zener Clamp Voltage tCLP VZ TA = 25 C, CBYPASS = open, CL (of test probe) = 10 pF, Sens = 7.5 mV/G TA = 25 C, CBYPASS = open, CL (of test probe) = 10 pF, Sens = 5.0 mV/G TA = 25 C, CBYPASS = open, CL (of test probe) = 10 pF, Sens = 3.125 mV/G TA = 25 C, CBYPASS = open, CL (of test probe) = 10 pF, Sens = 2.5 mV/G 4.5 - - - - - - 6 - Small signal -3 dB - - - - TA=25C; CL = 10 nF, Sens = 7.5 mV/G; no external filter TA=25C; CL = 10 nF, Sens = 5.0 mV/G; no external filter TA=25C; CL = 10 nF, Sens = 3.125 mV/G; no external filter TA=25C; CL = 10 nF, Sens = 2.5 mV/G; no external filter TA=25C; Sens = 2.5 mV/G; external 2 kHz low pass filter with R = 1.69 k, C = 47 nF 5.0 6.9 32 27 23 19 30 8.3 12 17 21 27 170 5.5 8 - - - - - - - - - - - V mA s s s s s V kHz kHz kHz kHz kHz
Symbol
Test Conditions
Min.
Typ.
Max.
Units
TA = 25C, CL = 10 nF TA = 25C, ICC = 11 mA A1381 A1382 A1383 A1384 TA = 25C
Internal Bandwidth
BWi
Chopping
Frequency2
fC
OUTPUT CHARACTERISTICS A1381 A1382 Noise (peak to peak) VN(p-p) A1383 A1384 A138x DC Output Resistance Output Load Resistance Output Load Capacitance Phase Shift3 ROUT RL CL VCLP(HIGH) Output Voltage Clamp4 VCLP(LOW) Output Slew Rate SR VOUT to VCC VOUT to GND VOUT to GND No load on VOUT, magnetic input signal frequency = 1 kHz, with 1 V(p-p) output signal TA = 25C, B = 600 G, Sens = 5.0 mV/G, RL = 10 k (VOUT to GND) TA = 25C, B = -600 G, Sens = 5.0 mV/G, RL = 10 k (VCC to VOUT) CL = 10 nF - - - - - - 4.7 4.7 - - 4.35 0.40 - 34 27 20 18 4.7 <1 - - - 3 4.5 0.55 175 - - - - - - - - 10 - 4.65 0.70 - mV mV mV mV mV k k nF deg. V V V/ms
Continued on the next page...
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
3
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
OPERATING CHARACTERISTICS (continued), valid over full operating temperature range, TA; CBYPASS= 0.1 F, VCC = 5 V, unless otherwise specified
Characteristic
PRE-PROGRAMMING TARGET5 Pre-Programming Quiescent Voltage Output
Symbol
Test Conditions
Min.
Typ.
Max.
Units
VOUT(Q)init
B = 0 G, TA = 25C A1381
- -
2.1 4.2 2.9 2.1 1.4 -0.05
- - - - - -
V mV/G mV/G mV/G mV/G %/C
Pre-Programming Sensitivity
Sensinit
A1382 A1383 A1384
TA = 25C
- - - -
Pre-Programming Sensitivity Temperature Coefficient6 Guaranteed Quiescent Voltage Output Range4,7 Quiescent Voltage Output Programming Bits Average Quiescent Voltage Output Step Size8,9 Quiescent Voltage Output Programming Resolution10 SENSITIVITY PROGRAMMING
TCSensinit
TA = 150C
QUIESCENT VOLTAGE OUTPUT PROGRAMMING VOUT(Q) B = 0 G, TA = 25C 2.3 - StepVOUT(Q) ErrPGVOUT(Q) TA = 25C TA = 25C 8 - - 6 11.5 StepVOUT(Q) x 0.5 - - - - 6 110 75 55 35 StepSENS x 0.5 2.6 - 15 - V bit mV mV
A1381 Guaranteed Sensitivity Range4,11 Sens A1382 A1383 A1384 Sensitivity Programming Bits A1381 Average Sensitivity Step Size8,9 StepSENS A1382 A1383 A1384 Sensitivity Programming Resolution10 SENSITIVITY TC PROGRAMMING Guaranteed Sensitivity Temperature Coefficient Range6 Sensitivity Temperature Coefficient Programming Bits Average Sensitivity Temperature Coefficient Step Size6 Sensitivity Temperature Coefficient Programming Resolution6 POLARITY PROGRAMMING Polarity Programming Bit12 LOCK BIT PROGRAMMING Overall Programming Lock Bit LOCK POL StepTCSENS ErrPGTCSENS TA = 150C TA = 150C TCSens TA = 150C ErrPGSENS TA = 25C TA = 25C TA = 25C
6.00 4.00 2.75 2.00 - 90 55 35 28 -
9.00 6.25 4.25 3.00 - 130 95 75 42 -
mV/G mV/G mV/G mV/G bit V/G V/G V/G V/G mV/G
0.00 - - -
- 3 0.03 StepTCSENS x 0.5 1 1
0.095 - - -
%/C bit %/C %/C
- -
- -
bit bit
Continued on the next page...
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
4
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
OPERATING CHARACTERISTICS (continued), valid over full operating temperature range,TA; CBYPASS= 0.1 F, VCC = 5 V, unless otherwise specified
Characteristic
ERROR COMPONENTS Linearity Sensitivity Error Symmetry Sensitivity Error Ratiometry Quiescent Voltage Output Error13 Ratiometry Sensitivity Error13 Ratiometry Clamp Error14 DRIFT CHARACTERISTICS
Symbol
LinERR SymERR RatERRVOUT(Q) RatERRSens RatERRCLP TA = 25C A1381
Test Conditions
Min.
- - - - - -
Typ.
1.5 1.5 1.5 1.5 1.5 - - - - 3 2
Max.
- - - - - 60 50 40 40 - -
Units
% % % % % mV mV mV mV % %
Quiescent Voltage Output Drift Through Temperature Range
VOUT(Q)
A1382 A1383 A1384
TA = 150C
- - - -
Sensitivity Drift Through Temperature Range15 Sensitivity Drift Due to Package Hysteresis1
1See
SensTC SensPKG TA = 25C; after temperature cycling
-
Characteristic Definitions section.
operating ambient temperature range, TA, and process. the magnetic input signal. 4Sens, V OUT(Q), VCLP(LOW) , and VCLP(HIGH) scale with VCC due to ratiometry. 5Raw device characteristic values before any programming. 6Programmed at 150C and calculated relative to 25C. 7V OUT(Q)(max) is the value available with all programming fuses blown (maximum programming code set). The VOUT(Q) range is the total range from VOUT(Q)init up to and including VOUT(Q)(max). See Characteristic Definitions section. 8Step size is larger than required, in order to provide for manufacturing spread. See Characteristic Definitions section. 9Non-ideal behavior in the programming DAC can cause the step size at each significant bit rollover code to be greater than twice the maximum specified value of StepVOUT(Q) , StepSENS , or StepTCSENS. 10Overall programming value accuracy. See Characteristic Definitions section. 11Sens(max) is the value available with all programming fuses blown (maximum programming code set). Sens range is the total range from Sens init up to and including Sens(max). See Characteristic Definitions section. 12Default polarity is for V OUT voltage to increase with a positive (south polarity) field applied to the branded face of the device. 13Percent change from actual value at V CC = 5 V, for a given temperature, over the guaranteed supply voltage operating range. 14Percent change from actual value at V CC = 5 V, TA = 25C, over the guaranteed supply voltage operating range. 15Sensitivity drift from expected value at T after programming TC A SENS. See Characteristic Definitions section.
2f varies up to approximately 20% over the full C 3Unit of measure (phase degrees) in reference to
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
5
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Package LH, 1-layer PCB with copper limited to solder pads Package Thermal Resistance RJA Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias Package UA, 1-layer PCB with copper limited to solder pads *Additional thermal information available on Allegro website. Value Units 228 110 165 C/W C/W C/W
Power Derating Curve
6
VCC(max)
Maximum Allowable VCC (V)
5
4
3
1-layer PCB, Package LH (R JA = 228 C/W) 1-layer PCB, Package UA (R JA = 165 C/W) 2-layer PCB, Package LH (R JA = 110 C/W)
VCC(min)
2
1
0 20 40 60 80 100 120 140 160 180
Temperature (C)
Power Dissipation versus Ambient Temperature
1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20
Power Dissipation, PD (mW)
2l (R aye rP JA = 1 CB 10 , Pa 1-la C ck yer /W ag (R eL PC ) B, P JA = H 165 ack C/ age W) UA
1-lay er P (R CB, P JA = 2 28 ackage C/W LH )
40
60
80 100 120 Temperature (C)
140
160
180
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
6
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Characteristic Definitions
Power-On Time When the supply is ramped to its operating
Quiescent Voltage Output In the quiescent state (no significant
voltage, the device requires a finite time to power its internal components before responding to an input magnetic field. Power-On Time, tPO , is defined as: the time it takes for the output voltage to settle within 10% of its steady state value under an applied magnetic field, after the power supply has reached its minimum specified operating voltage, VCC(min), as shown in the following chart.
V VCC(typ.) 90% VOUT VCC VOUT
magnetic field: B = 0 G), the output, VOUT(Q), has a constant ratio to the supply voltage, VCC, throughout the entire operating ranges of VCC and ambient temperature, TA.
Guaranteed Quiescent Voltage Output Range The quiescent
voltage output, VOUT(Q), can be programmed around its nominal value of 2.5 V, within the guaranteed quiescent voltage range limits: VOUT(Q)(min) and VOUT(Q)(max). The available guaranteed programming range for VOUT(Q) falls within the distributions of the initial, VOUT(Q)init, and the maximum programming code for setting VOUT(Q), as shown in the following diagram.
VCC(min.) tPO t1 t2 t1= time at which power supply reaches minimum specified operating voltage t2= time at which output voltage settles within 10% of its steady state value under an applied magnetic field 0
VOUT(Q)init(typ)
Guaranteed Output Programming Range, VOUT(Q)
Distribution for VOUT(Q)init
VOUT(Q)(min)
Distribution for Max Code VOUT(Q)
VOUT(Q)(max)
+t
Average Quiescent Voltage Output Step Size The average quiDelay to Clamp A large magnetic input step may cause the
clamp to overshoot its steady state value. The Delay to Clamp, tCLP , is defined as: the time it takes for the output voltage to settle within 1% of its steady state value, after initially passing through its steady state voltage, as shown in the following chart.
V VCLP(HIGH) VOUT tCLP t1 t2 Magnetic Input
escent voltage output step size for a single device is determined using the following calculation: VOUT(Q)maxcode -VOUT(Q)init . StepVOUT(Q) = (1) 2n-1 where: n is the number of available programming bits in the trim range, 2n-1 is the value of the maximum programming code in the range, and VOUT(Q)maxcode is the quiescent voltage output at code 2n-1.
Quiescent Voltage Output Programming Resolution The programming resolution for any device is half of its programming step size. Therefore, the typical programming resolution will be:
t1= time at which output voltage initially reaches steady state clamp voltage t2= time at which output voltage settles to within 1% of steady state clamp voltage Note: Times apply to both high clamp (shown) and low clamp. 0
ErrPGVOUT(Q)(typ) = 0.5 x Step VOUT(Q)(typ)
.
(2)
t
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
7
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Quiescent Voltage Output Drift Through Temperature Range
Due to internal component tolerances and thermal considerations, the quiescent voltage output, VOUT(Q), may drift from its nominal value over the operating ambient temperature, TA. For purposes of specification, the Quiescent Voltage Output Drift Through Temperature Range, VOUT(Q) (mV), is defined as: VOUT(Q) = VOUT(Q)(TA) -VOUT(Q)(25C)
ming temperature of 25C. TCSENS (%/C) is defined as: SensT2 - SensT1 1 TCSens = x 100% T2-T1 SensT1
,
(5)
.
(3)
where T1 is the nominal Sens programming temperature of 25C, and T2 is the TCSENS programming temperature of 150C. The ideal value of Sens over the full ambient temperature range, SensIDEAL(TA), is defined as: SensIDEAL(TA) = SensT1 [100% + TCSENS (TA -T1)] (6)
Guaranteed Sensitivity Temperature Coefficient Range The
Sensitivity The presence of a south polarity magnetic field, perpendicular to the branded surface of the package face, increases the output voltage from its quiescent value toward the supply voltage rail (assuming that the polarity bit, POL, is in its initial state of logic 0). The amount of the output voltage increase is proportional to the magnitude of the magnetic field applied. Conversely, the application of a north polarity field decreases the output voltage from its quiescent value. This proportionality is specified as the magnetic sensitivity, Sens (mV/G), of the device, and it is defined as:
magnetic sensitivity temperature coefficient can be programmed within its limits: TCSens(max) and TCSens(min). Refer to the Guaranteed Quiescent Voltage Output Range section for a conceptual explanation of how value distributions and ranges are related.
Average Sensitivity Temperature Coefficient Step Size Refer
Sens =
VOUT(BPOS) - VOUT(BNEG) BPOS - BNEG
,
(4)
where BPOS and BNEG are two magnetic fields with opposite polarities.
Guaranteed Sensitivity Range The magnetic sensitivity, Sens,
to the Average Quiescent Voltage Output Step Size section for a conceptual explanation.
Sensitivity Temperature Coefficient Programming Resolution
can be programmed around its nominal value, 2.5 to 7.5 mV/G depending on device type, within the sensitivity range limits: Sens(min) and Sens(max). Refer to the Guaranteed Quiescent Voltage Output Range section for a conceptual explanation of how value distributions and ranges are related.
Average Sensitivity Step Size Refer to the Average Quiescent
Refer to the Quiescent Voltage Output Programming Resolution section for a conceptual explanation.
Sensitivity Drift Through Temperature Range Second order
Voltage Output Step Size section for a conceptual explanation.
Sensitivity Programming Resolution Refer to the Quiescent
Voltage Output Programming Resolution section for a conceptual explanation.
Sensitivity Temperature Coefficient Device sensitivity changes
sensitivity temperature coefficient effects cause the magnetic sensitivity, Sens, to drift from its ideal value over the operating ambient temperature range, TA. For purposes of specification, the sensitivity drift through temperature range, SensTC, is defined as: SensTA - SensIDEAL(TA) SensTC = x 100% . (7) SensIDEAL(TA)
Sensitivity Drift Due to Package Hysteresis Package stress and
as temperature changes, with respect to its programmed sensitivity temperature coefficient, TCSENS. TCSENS is programmed at 150C, and calculated relative to the nominal sensitivity program
relaxation can cause the device sensitivity at TA = 25C to change during and after temperature cycling.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
8
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
For purposes of specification, the sensitivity drift due to package hysteresis, SensPKG, is defined as: Sens(25C)2 - Sens(25C)1 SensPKG = x 100% Sens(25C)1
Symmetry error, SymERR (%), is measured and defined as: SensBPOS SymERR = 1- Sens BNEG x 100%
,
(8)
,
(12)
where Sens(25C)1 is the programmed value of sensitivity at TA = 25C, and Sens(25C)2 is the value of sensitivity at TA = 25C, after temperature cycling TA up to 150C, down to -40C, and back to up 25C.
Linearity Sensitivity Error The 138x family is designed to
where SensBx is as defined in equation 10, and BPOS and BNEG are positive and negative magnetic fields such that |BPOS| = |BNEG|.
Ratiometry Error The A138x devices feature ratiometric output.
This means that the quiescent voltage output, VOUT(Q) , magnetic sensitivity, Sens, and clamp voltage, VCLP(HIGH) and VCLP(LOW), are proportional to the supply voltage, VCC. In other words, when the supply voltage increases or decreases by a certain percentage, each characteristic also increases or decreases by the same percentage. Error is the difference between the measured change in the supply voltage relative to 5 V, and the measured change in each characteristic. The ratiometric error in quiescent voltage output, RatERRVOUT(Q)
provide a linear output in response to a ramping applied magnetic field. Consider two magnetic fields, B1 and B2. Ideally, the sensitivity of a device is the same for both fields, for a given supply voltage and temperature. Linearity error is present when there is a difference between the sensitivities measured at B1 and B2. Linearity Error is calculated separately for the positive (LinERRPOS) and negative (LinERRNEG ) applied magnetic fields. Linearity error (%) is measured and defined as: SensBPOS2 x 100% LinERRPOS = 1- Sens BPOS1 SensBNEG2 x 100% LinERRNEG = 1- Sens BNEG1 where: SensBx = |VOUT(Bx) - VOUT(Q)| Bx
, ,
(9)
(%), for a given supply voltage, VCC, is defined as: VOUT(Q)(VCC) / VOUT(Q)(5V) x 100% RatERRVOUT(Q) = 1- VCC / 5 V
. (13)
The ratiometric error in magnetic sensitivity, RatERRSens (%), for a given supply voltage, VCC, is defined as: (10)
,
and BPOSx and BNEGx are positive and negative magnetic fields, with respect to the quiescent voltage output such that |BPOS2| > |BPOS1| and |BNEG2| > |BNEG1|. Then: LinERR = max( |LinERRPOS | , |LinERRNEG | )
Sens(VCC) / Sens(5V) x 100% RatERRSens = 1- VCC / 5 V
.
(14)
The ratiometric error in the clamp voltages, RatERRCLP (%), for a given supply voltage, VCC, is defined as:
. (11)
Symmetry Sensitivity Error The magnetic sensitivity of an
A138x device is constant for any two applied magnetic fields of equal magnitude and opposite polarities.
VCLP(VCC) / VCLP(5V) x 100% RatERRCLP = 1- VCC / 5 V where VCLP is either VCLP(HIGH) or VCLP(LOW).
.
(15)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
9
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Typical Application Drawing
V+
VCC
VOUT
CBYPASS GND
CL
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall sensor. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The patented Allegro technique, namely Dynamic Quadrature Offset Cancellation, removes key sources of the output drift induced by thermal and mechanical stresses. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetic field-induced signal in the frequency domain, through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetic field-induced signal to recover its original spectrum at base band, while the DC offset becomes a high-frequency signal. The magnetic-sourced signal then can pass through a low-pass filter, while the modulated DC offset is suppressed. The chopper stabilization technique uses a 170 kHz high frequency clock. For the demodulation process, a sample and hold technique is used, where the sampling is performed at twice the chopper frequency (340 kHz). This high-frequency operation allows a greater sampling rate, which results in higher accuracy and faster signalprocessing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses, and produces devices that have extremely stable quiescent Hall output voltages and Precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic integration and sample-and-hold circuits.
Regulator
Clock/Logic Hall Element Sample and Hold Low-Pass Filter
Amp
Concept of Chopper Stabilization Technique
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
10
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Programming Guidelines
Definition of Terms
Register. The section of the programming logic that controls the choice of programmable modes and parameters. Bit Field. The internal fuses unique to each register, represented as a binary number. Incrementing the bit field of a particular register causes its programmable parameter to change, based on the internal programming logic. Key. A series of VPM voltage pulses used to select a register, with a value expressed as the decimal equivalent of the binary value. The LSB of a register is denoted as key 1, or bit 0. Code. The number used to identify the combination of fuses activated in a bit field, expressed as the decimal equivalent of the binary value. The LSB of a bit field is denoted as code 1, or bit 0. Addressing. Incrementing the bit field code of a selected register by serially applying a pulse train through the VOUT pin of the device. Each parameter can be measured during the addressing process, but the internal fuses must be blown before the programming code (and parameter value) becomes permanent. Fuse Blowing. Applying a VPH voltage pulse of sufficient duration at the VP(HIGH) level to permanently set an addressed bit by blowing a fuse internal to the device. Once a bit (fuse) has been blown, it cannot be reset. Blow Pulse. A VPH voltage pulse of sufficient duration at the VP(HIGH) level to blow the addressed fuse. Cycling the Supply. Powering-down, and then powering-up the supply voltage. Cycling the supply is used to clear the programming settings in Try mode.
Overview
Programming is accomplished by sending a series of input voltage pulses serially through the VOUT pin of the device. A unique combination of different voltage level pulses controls the internal programming logic of the device to select a desired programmable parameter and change its value. There are two programming pulses, referred to as a high voltage pulse, VPH, consisting of a VP(LOW) -VP(HIGH) -VP(LOW) sequence and a mid voltage pulse, VPM, consisting of a VP(LOW) -VP(MID) -VP(LOW) sequence. The 138x features Try mode, Blow mode, and Lock mode: * In Try mode, the value of a single programmable parameter may be set and measured. The parameter value is stored temporarily, and resets after cycling the supply voltage. Note that other parameters cannot be accessed simultaneously in this mode. * In Blow mode, the value of a single programmable parameter may be permanently set by blowing solid-state fuses internal to the device. Additional parameters may be blown sequentially. * In Lock mode, a device-level fuse is blown, blocking the further programming of all parameters. The programming sequence is designed to help prevent the device from being programmed accidentally; for example, as a result of noise on the supply line. Although any programmable variable power supply can be used to generate the pulse waveforms, Allegro highly recommends using the Allegro Sensor Evaluation Kit, available on the Allegro Web site On-line Store. The manual for that kit is available for download free of charge, and provides additional information on programming these devices.
Programming Pulse Requirements, Protocol at TA = 25C
Characteristic
Programming Voltage
Symbol
VP(LOW) VP(MID) VP(HIGH) Measured at the VOUT pin.
Notes
Min. Typ. Max. Units
14 26 15 27 5.5 16 28 100 100 V V V mA s s s s s s s
Programming Current
IP tOFF(HIGH) tOFF(MID)
Minimum supply current required to ensure proper fuse blowing. In addition, a minimum capacitance, CBLOW = 0.1 F, must be connected between the VOUT and GND pins during programming to provide the current necessary for fuse blowing. Duration at VP(LOW) level following a VP(HIGH) level. Duration at VP(LOW) level following a VP(MID) level. Duration of VP(HIGH) level for VPH pulses during key/code selection. Duration of VP(MID) level for VPH pulses during key/code selection. Duration at VP(HIGH) level for fuse blowing. Rise time required for transitions from VP(LOW) to either VP(MID) or VP(HIGH). Fall time required for transitions from VP(HIGH) to either VP(MID) to VP(LOW).
300 30 5 30 15 30 1 1
Pulse Width
tACTIVE(HIGH) tACTIVE(MID) tBLOW
Pulse Rise Time Pulse Fall Time
tPr tPf
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
11
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Programming Procedures
Parameter Selection
Each programmable parameter can be accessed through a specific register. To select a register, a sequence of voltage pulses consisting of a VPH pulse, a series of VPM pulses, and a VPH pulse (with no VCC supply interruptions) must be applied serially to the VOUT pin. The number of VPM pulses is called the key, and uniquely identifies each register. The pulse train used for selection of the first register, key 1, is shown in figure 1.
V+ VP(HIGH)
The A138x has three registers that select among the five programmable parameters: * Register 1: Quiescent voltage output, VOUT(Q) * Register 2: Sensitivity, Sens * Register 3: Sensitivity temperature coefficient, TCSens Polarity, POL Overall device locking, LOCK
Bit Field Addressing
After a programmable parameter has been selected, a VPH pulse transitions the programming logic into the bit field addressing state. Applying a series of VPM pulses to the VOUT pin of the device, as shown in figure 2, increments the bit field of the selected parameter.
tACTIVE
VP(MID)
VP(LOW) tLOW 0
Figure 1. Parameter selection pulse train. This shows the sequence for selecting the register corresponding to key 1, indicated by a single VPM pulse.
When addressing the bit field, the number of VPM pulses is represented by a decimal number called a code. Addressing activates the corresponding fuse locations in the given bit field by incrementing the binary value of an internal DAC. The value of the bit field (and code) increments by one with the falling edge of each VPM pulse, up to the maximum possible code (see the Programming Logic table). As the value of the bit field code increases, the value of the programmable parameter changes. Measurements can be taken after each pulse to determine if the desired result for the programmable parameter has been reached. Cycling the supply voltage resets all the locations in the bit field that have unblown fuses to their initial states.
Code 2n - 2
Code 1
VP(MID)
Code 2
VP(HIGH)
Code 2n - 1
V+
Fuse Blowing
VP(LOW)
0
Figure 2. Bit field addressing pulse train. Addressing the bit field by incrementing the code causes the programmable parameter value to change. The number of bits available for a given programming code, n, varies among parameters; for example, the bit field for VOUT(Q) has 6 bits available, which allows 63 separate codes to be used.
After the required code is found for a given parameter, its value can be set permanently by blowing individual fuses in the appropriate register bit field. Blowing is accomplished by applying a VPH pulse, called a blow pulse, of sufficient duration at the VP(HIGH) level to permanently set an addressed bit by blowing a fuse internal to the device. Due to power requirements, the fuse for each bit in the bit field must be blown individually. To accomplish this, the code representing the desired parameter value must be translated to a binary number. For example, as shown
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
12
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
in figure 3, decimal code 5 is equivalent to the binary number 101. Therefore bit 2 (code 4) must be addressed and blown, the device power supply cycled, and then bit 0 (code 1) addressed and blown. An appropriate sequence for blowing code 5 is shown in figure 4. The order of blowing bits, however, is not important. Blowing bit 0 first, and then bit 2 is acceptable. Note: After blowing, the programming is not reversible, even after cycling the supply power. Although a register bit field fuse cannot be reset after it is blown, additional bits within the same register can be blown at any time until the device is locked. For example, if bit 1 (binary 10) has been blown, it is still possible to blow bit 0. The end result would be binary 11 (decimal code 3).
Locking the Device
After the desired code for each parameter is programmed, the device can be locked to prevent further programming of any parameters.
Additional Guidelines
The additional guidelines in this section should be followed to ensure the proper behavior of these devices: * A 0.1 F blowing capacitor, CBLOW, must be mounted between the VOUT pin and the GND pin during programming, to ensure enough current is available to blow fuses. * The CBLOW blowing capacitor must be replaced in the final application with a suitable CL. (The maximum load capacitance is 10 nF for proper operation.)
Bit Field Selection Address Code Format
(Decimal Equivalent) Code 5
* The power supply used for programming must be capable of delivering at least 26 V and 300 mA. * Be careful to observe the tLOW delay time before powering down the device after blowing each bit.
Code in Binary
(Binary) 101
Fuse Blowing Target Bits
Bit 2
Bit 0
* The following programming order is recommended: 1. POL 2. TCSENS 3. Sens 4. VOUT(Q) 5. LOCK (only after all other parameters have been programmed and validated, because this prevents any further programming of the device)
Fuse Blowing Address Code Format
Code 4 Code 1 (Decimal Equivalents)
Figure 3. Example of code 5 broken into its binary components, which are code 4 and code 1.
V+ VP(HIGH)
VP(MID)
VP(LOW) Register Selection (Key 1) 0 VCC = 0 V Addressing (Code 4) Blow (Code 4 in Key 1) tBLOW VCC = 0 V Programming of Code 5 in Key 1 Addressing (Code 1) VCC = 0 V Register Selection (Key 1) Blow (Code 1 in Key 1)
Figure 4. Example of programming pulses applied to the VOUT pin that result in permanent parameter settings. In this example, the register corresponding to key 1 is selected and code 5 is addressed and blown.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
13
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Programming Modes
Try Mode
Try mode allows a single programmable parameter to be tested without permanently setting its value. Multiple parameters cannot be tested simultaneously in this mode. After powering the VCC supply, select the desired parameter register and address its bit field. When addressing the bit field, each VPM pulse increments the value of the parameter register, up to the maximum possible code (see Programming Logic table). The addressed parameter value remains stored in the device even after the programming drive voltage is removed from the VOUT pin, allowing the value to be measured. Note that for accurate time measurements, the blow capacitor, CBLOW, should be removed during output voltage measurement. It is not possible to decrement the value of the register without resetting the parameter bit field. To reset the bit field, and thus the value of the programmable parameter, cycle the supply (VCC) voltage.
Blow Mode
After the required value of the programmable parameter is found using Try mode, its corresponding code should be blown to make its value permanent. To do this, select the required parameter register, and address and blow each required bit separately (as described in the Fuse Blowing section). The supply must be cycled between blowing each bit of a given code. After a bit is blown, cycling the supply will not reset its value.
Lock Mode
To lock the device, address the LOCK bit and apply a blow pulse with CBLOW in place. After locking the device, no future programming of any parameter is possible.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
14
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Programming State Machine
Power-Up VPM Initial VPH Parameter Selection VPM VPM VPM TCSENS, POL, LOCK VPM VPH
SENS
VOUT(Q)
VPH Bit Field Addressing VPM VPM VPM 2n - 1 n = total bits in register VPM
1
2
VPH VPM = VP(LOW) -VP(MID) -VP(LOW) VPH = VP(LOW) -VP(HIGH) -VP(LOW) Fuse Blowing
User Power-Down Required
Initial State After system power-up, the programming logic is
Bit Field Addressing State This state allows the selection of the
reset to a known state. This is referred to as the Initial state. All the bit field locations that have intact fuses are set to logic 0. While in the Initial state, any VPM pulses on the VOUT pin are ignored. To enter the Parameter Selection state, apply one VPH pulse on the VOUT pin.
Parameter Selection State This state allows the selection of the
individual bit fields to be programmed in the selected parameter register (see Programming Logic table). To leave this state, either cycle device power or blow the fuses for the selected code. Note that merely addressing the bit field does not permanently set the value of the selected programming parameter; fuses must be blown to do so.
Fuse Blowing State To blow an addressed bit field, apply a
parameter register containing the bit fields to be programmed. To select a parameter register, increment through the keys by applying VPM pulses on the VOUT pin. Register keys select among the following programming parameters: * 1 pulse - Sens * 2 pulses - VOUT(Q) * 3 pulses - TCSENS, POL, and LOCK To enter the Bit Field Addressing state, apply one VPH pulse on the VOUT pin.
VPH pulse on the VOUT pin. Power to the device should then be cycled before additional programming is attempted. Note: Each bit representing a decimal code must be blown individually (see the Fuse Blowing section).
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
15
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Programming Logic Table
Programmable Parameter (Register Key)
Sens (1) VOUT(Q) (2)
Bit Field Address Binary Format [MSB LSB]
000000 111111 000000 111111 000000 000111
Decimal Equivalent Code
0 63 0 63 0 7 8 16
Description
Initial value (Sensinit) Maximum value of sensitivity (Sens) in range Initial value (VOUT(Q)init) Maximum value of quiescent voltage output (VOUT(Q)) in range; B = 0 G Initial value of sensitivity temperature coefficient range (TCSensinit) Maximum value of sensitivity temperature coefficient (TCSens) in range POL bit, switches polarity (causes VOUT to increase with a negative [north polarity] field applied to the branded face of the device) LOCK bit, enables permanent locking of all programming bit fields in the device
TCSENS , POL, LOCK (3)
001000 010000
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
16
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Package LH, 3 Pin; (SOT-23W)
3.00 .118 2.70 .106 0.15 [.006] M C A B 3.04 .120 2.80 .110
A
A 1.49 .059 NOM 8 0 0.20 .008 0.08 .003
3 All dimensions reference only, not for tooling use Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC TO-236 AB, except case width and terminal tip-to-tip) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Hall element (not to scale) Active Area Depth 0.28 [.011] Fits SC-59A Solder Pad Layout; adjust to process requirements
B
B
A B
C
2.10 .083 1.85 .073
A
0.96 .038
A NOM
0.60 .024 0.25 .010
1
2 0.25 .010
3X 0.10 [.004] C 3X 0.50 .020 0.30 .012 0.20 [.008] M C A B 0.95 .037 1.90 .075
SEATING PLANE 1.17 .046 0.75 .030 0.15 .006 0.00 .000
C
SEATING PLANE GAUGE PLANE
0.70 .028 NOM
3
C
2.40 .094 NOM
1.00 .039 NOM
1
2
0.95 .037 NOM
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
17
A1381, A1382, A1383, and A1384
Programmable Linear Hall Effect Sensors with Analog Output Available in a Miniature Thin Profile Surface Mount Package
Package UA, 3 Pin SIP
.164 4.17 .159 4.04
C D
.0805 2.04 NOM
.062 1.57 .058 1.47
D
.122 3.10 .117 2.97
.0565 1.44 NOM
D
B
.085 2.16 MAX
.031 0.79 REF A
.640 16.26 .600 15.24
.017 0.44 .015 0.38
Dimensions in inches Metric dimensions (mm) in brackets, for reference only A Dambar removal protrusion (6X)
B Ejector mark on opposite side C Active Area Depth .0195 [0.50] NOM D Hall element (not to scale); dimensions preliminary
1 .019 0.48 .014 0.36
2
3
.050 1.27 NOM
Copyright (c)2007, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
18


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